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8051 Microcontroller Particular Operate Registers (SFRs)

Within the earlier 8051 Microcontroller Tutorial, we have now seen the Instruction Set and Addressing Modes. On this tutorial, we are going to check out the 8051 Microcontroller Particular Operate Registers or SFRs.

Should you bear in mind from the 8051 Microcontroller Memory Organization Tutorial, the inner RAM or Knowledge Reminiscence of the 8051 Microcontroller is split in to Common Goal Registers, Bit Addressable Registers, Register Banks and Particular Operate Registers or SFRs.

The 8051 Microcontroller Particular Operate Registers are used to program and management completely different {hardware} peripherals like Timers, Serial Port, I/O Ports and so on. Actually, by manipulating the 8051 Microcontroller Particular Operate Registers (SFRs), you’ll be able to assess or change the working mode of the 8051 Microcontroller.

As a reminder, the next picture reveals you the essential construction of 8051 Microcontroller’s Inside RAM.

8051 Microcontroller Special Function Registers (SFRs) Image 1

8051 Microcontroller Particular Operate Registers (SFRs)

The 8051 Microcontroller Particular Operate Registers act as a management desk that monitor and management the operation of the 8051 Microcontroller. Should you observe in Inside RAM Construction, the Deal with Area from 80H to FFH is allotted to SFRs.

Out of those 128 Reminiscence Places (80H to FFH), there are solely 21 areas which can be really assigned to SFRs. Every SFR has one Byte Deal with and in addition a singular identify which specifies its function.

Because the SFRs are part of the Inside RAM Construction, you’ll be able to entry SFRs as should you entry the Inside RAM. The primary distinction is the deal with house: first 128 Bytes (00H to 7FH) is for normal Inside RAM and subsequent 128 Bytes (80H to FFH) is for SFRs.

TIP: As solely 21 of the attainable 128 SFR reminiscence areas are assigned, it is suggested that the remaining registers or reminiscence areas will not be accessed throughout programming.

Earlier than going additional, get an concept on 8051 MICROCONTROLLER ARCHITECTURE.

Checklist of 8051 Microcontroller Particular Operate Registers

  • A or ACC
  • B
  • DPL
  • DPH
  • IE
  • IP
  • P0
  • P1
  • P2
  • P3
  • PCON
  • PSW
  • SCON
  • SBUF
  • SP
  • TMOD
  • TCON
  • TL0
  • TH0
  • TL1
  • TH1

Classes of 8051 Microcontroller Particular Operate Registers

All of the 21 8051 Microcontroller Particular Operate Registers (SFRs) together with their features and Inside RAM Deal with is given within the following desk.

8051 Microcontroller Special Function Registers (SFRs) Image 2

There are numerous methods to categorize these 21 Particular Operate Registers however I discover the next method as an acceptable one. The 21 Particular Operate Registers of 8051 Microcontroller are categorized in to seven teams. They’re:

Math or CPU Registers: A and B

Standing Register: PSW (Program Standing Phrase)

Pointer Registers: DPTR (Knowledge Pointer – DPL, DPH) and SP (Stack Pointer)

I/O Port Latches: P0 (Port 0), P1 (Port 1), P2 (Port 2) and P3 (Port 3)

Peripheral Management Registers: PCON, SCON, TCON, TMOD, IE and IP

Peripheral Knowledge Registers: TL0, TH0, TL1, TH1 and SBUF

CPU or Math Registers

A or Accumulator (ACC)

The Accumulator or Register A is a very powerful and most used 8051 Microcontroller SFRs. The Register A is situated on the deal with E0H within the SFR reminiscence house. The Accumulator is used to carry the information for nearly all of the ALU Operations.

A few of the operations the place the Accumulator is used are:

  • Arithmetic Operations like Addition, Subtraction, Multiplication and so on.
  • Logical Operations like AND, OR, NOT and so on.
  • Knowledge Switch Operations (between 8051 and Exterior Reminiscence)

The identify “Accumulator” got here from the actual fact this register is used to build up (or retailer) the results of all Arithmetic and a lot of the Logical Operations.

8051 Microcontroller Special Function Registers (SFRs) Image 3

B (Register B)

The B Register is used together with the ACC in Multiplication and Division operations. These two operations are carried out on knowledge which can be saved solely in Registers A and B. Throughout Multiplication Operation, one of many operand (multiplier or multiplicand) is shops in B Register and in addition the upper byte of the consequence.

In case of Division Operation, the B Register holds the divisor and in addition the rest of the consequence. It may also be used as a Common Goal Register for regular operations and is commonly used as an Auxiliary Register by Programmers to retailer momentary outcomes.

Register B is situated on the deal with F0H of the SFR Deal with Area.

8051 Microcontroller Special Function Registers (SFRs) Image 4

Program Standing Phrase (PSW)

The PSW or Program Standing Phrase Register can also be known as as Flag Register and is among the necessary SFRs. The PSW Register consists of Flag Bits, which assist the programmer in checking the situation of the consequence and in addition make choices.

Flags are 1-bit storage components that retailer and point out the character of the consequence that’s generated by execution of sure directions. The next picture reveals the contents of the PSW Register.

8051 Microcontroller Special Function Registers (SFRs) Image 5

The next desk describes the operate of every flag.

8051 Microcontroller Special Function Registers (SFRs) Image 6

Pointer Registers

Knowledge Pointer (DPTR – DPL and DPH)

The Knowledge Pointer is a 16-bit Register and is bodily the mix of DPL (Knowledge Pointer Low) and DPH (Knowledge Pointer Excessive) SFRs. The Knowledge Pointer can be utilized as a single 16-bit register (as DPTR) or two 8-bit registers (as DPL and DPH).

DPTR doesn’t have a bodily Reminiscence Deal with however the DPL (Decrease Byte of DPTR) and DPH (Greater Byte of DPTR) have separate addresses within the SFR Reminiscence Area. DPL = 82H and DPH = 83H.

The DPTR Register is utilized by the programmer addressing exterior reminiscence (Program – ROM or Knowledge – RAM).

8051 Microcontroller Special Function Registers (SFRs) Image 7_1

Stack Pointer (SP)

SP or Stack Pointer factors out to the highest of the Stack and it signifies the following knowledge to be accessed. Stack Pointer might be accesses utilizing PUSH, POP, CALL and RET Directions. The Stack Pointer is an 8-bit register and upon reset, the Stack Pointer is initialized with 07H.

When writing a brand new knowledge byte into the stack, the SP (Stack Pointer) is mechanically incremented by 1 and the brand new knowledge is written at an deal with SP+1. When studying knowledge from stack, the information is retrieved from the Deal with in SP and after that the SP is decremented by 1 (SP-1).

8051 Microcontroller Special Function Registers (SFRs) Image 8_1

I/O Port Registers (P0, P1, P2 and P3)

The 8051 Microcontroller 4 Ports which can be utilized as Enter and/or Output. These 4 ports are P0, P1, P2 and P3. Every Port has a corresponding register with similar names (the Port Registers are additionally P0, P1, P2 and P3). The addresses of the Port Registers are as follows: P0 – 80H, P1 – 90H, P2 – A0H and P2 – B0H.

Every bit in these SFRs corresponds to 1 bodily Pin within the 8051 Microcontroller. All these Port Registers are each Bit Addressable and Byte Addressable. Writing 1 or 0 on a Port Register Bit will replicate as an acceptable voltage (5V and 0V) on the corresponding Pin.

If a Port Bit is SET (declared as 1), the corresponding Port Pin can be configured as Enter and equally if a Port Bit is CLEARED (declared as 0), the corresponding Port Pin is configured as Output. Upon reset, all of the Port Bits are SET (1) and therefore, all of the Port Pins are configured as Inputs.

8051 Microcontroller Special Function Registers (SFRs) Image 9_1

Peripheral Management Registers

PCON (Energy Management)

The PCON or Energy Management register, because the identify suggests is used to manage the 8051 Microcontroller’s Energy Modes and is situated at 87H of the SFR Reminiscence Area. Utilizing two bits within the PCON Register, the microcontroller might be set to Idle Mode and Energy Down Mode.

NOTE: PCON register is just not bit addressable.

Throughout Idle Mode, the Microcontroller will cease the Clock Sign to the ALU (CPU) however it’s given to different peripherals like Timer, Serial, Interrupts, and so on. With a view to terminate the Idle Mode, you must use an Interrupt or {Hardware} Reset.

Within the Energy Down Mode, the oscillator can be stopped and the facility can be decreased to 2V. To terminate the Energy Down Mode, you must use the {Hardware} Reset.

Aside from these two, the PCON Register may also be used for few extra functions. The SMOD Bit within the PCON Register is used to manage the Baud Price of the Serial Port.

There are two common function Flag Bits within the PCON Register, which can be utilized by the programmer throughout execution.

8051 Microcontroller Special Function Registers (SFRs) Image 10_1

The next desk describes the operate of every bit within the PCON Register.

Bit

Image Description Extra Data
7 SMOD Serial Comm. Baud Price Modify Bit

If 1, doubles the baud charge utilizing Timer 1. If 0, regular timer 1 baud charge.

6 – 4

—-  

3

GF1

Common Goal Person Flag (Bit 1)

 
2 GF0 Common Goal Person Flag (Bit 0)

1

PD Energy Down Bit To enter Energy Down Mode, set to 1
0 IDL Idle Mode Bit

To enter Idle Down Mode, set to 1

SCON (Serial Management)

The Serial Management or SCON SFR is used to manage the 8051 Microcontroller’s Serial Port. It’s situated as an deal with of 98H. Utilizing SCON, you’ll be able to management the Operation Modes of the Serial Port, Baud Price of the Serial Port and Ship or Obtain Knowledge utilizing Serial Port.

SCON Register additionally consists of bits which can be mechanically SET when a byte of knowledge is transmitted or obtained.

8051 Microcontroller Special Function Registers (SFRs) Image 11

The next desk describes the operate of every bit within the SCON Register.

Bit

Image Description
7 SM0

Serial Port Mode Choice Bit 0

6

SM1 Serial Port Mode Choice Bit 1
5 SM2

Multiprocessor Comm. Bit

4

REN Obtain Allow Bit
3 TB8

Transmitted Bit 8

2

RB8 Acquired Bit 8
1 TI

Transmit Interrupt Flag

0

RI

Obtain Interrupt Flag

The Serial Port Mode Choice Bits (SM0 and SM1) decide the mode of UART and in addition the baud charge. The next desk provides an summary of how the Serial Port Mode Choice Bits can be utilized to configure Serial Port (UART) of 8051.

Serial Port Mode Choice Bits

SM0

SM1 Mode Description Baud Price
0 0 0 8-Bit Synchronous Shift Register Mode

Mounted Baud Price

(Frequency of oscillator / 12)

0

1 1 8-bit Customary UART

mode

Variable Baud Price (Could be set by Timer 1)
1 0 2 9-bit Multiprocessor Comm. mode

Mounted Baud Price

(Frequency of oscillator / 32 or Frequency of oscillator / 64

1

1 3 9-bit Multiprocessor Comm. mode

Variable Baud Price (Could be set by Timer 1)

TCON (Timer Management)

Timer Management or TCON Register is used to start out or cease the Timers of 8051 Microcontroller. It additionally comprises bits to point if the Timers has overflowed. The TCON SFR additionally consists of Interrupt associated bits.

8051 Microcontroller Special Function Registers (SFRs) Image 12

The next desk provides the outline of every bit within the TCON SFR.

Bit

Image Description

Extra Data

7

TF1 Timer 1 Overflow Flag Set when Timer 1 overflows (all 1s to 0). Cleared when processor executes ISR at 001BH.
6 TR1 Timer 1 Run Management Bit

To allow Timer/Counter, set to 1. Clear to halt the timer.

5

TF0 Timer 0 Overflow Flag Set when Timer 0 overflows (all 1s to 0). Cleared when processor executes ISR at 000BH.
4 TR0 Timer 0 Run Management Bit

To allow Timer/Counter, set to 1. Clear to halt the timer.

3

IE1 Ext. Interrupt 1 Edge Flag Set when HIGH to LOW is obtained on INT1 (P3.3). Cleared when processor executes ISR at 0013H.
2 IT1 Ext. Interrupt 1 Sort Management Bit

If 1, Interrupt 1 happens on falling edge. If 0, Interrupt 1 happens on low degree.

1

IE0 Ext. Interrupt 0 Edge Flag Set to 1 when HIGH to LOW is obtained on INT0 (P3.2). Cleared when processor executes ISR at 0003H.
0 IT0 Ext. Interrupt 0 Sort Management Bit

If 1, Interrupt 0 happens on falling edge. If 0, Interrupt 0 happens on low degree.

TMOD (Timer Mode)

The TMOD or Timer Mode register or SFR is used to set the Working Modes of the Timers T0 and T1. The decrease 4 bits are used to configure Timer0 and the upper 4 bits are used to configure Timer1.

8051 Microcontroller Special Function Registers (SFRs) Image 13

The next desk provides a quick description of every bit within the TMOD SFR.

Bit

Image

Description

7 / 3

Gate OR Gate Allow Bit
6 / 2 C/Tx

Choose Timer or Counter Mode

5 / 1

TxM1 Timer / Counter Working Mode Choose Bit 1
4 / 0 TxM0

Timer / Counter Working Mode Choose Bit 0

The Gatex bit is used to function the Timerx with respect to the INTx pin or whatever the INTx pin.

  • GATE1 = 1 ==> Timer1 is operated provided that TR1 (in TCON) is SET and Sign on INT1 is HIGH.
  • GATE1 = 0 ==> Timer1 is operated no matter Sign on INT1 pin however TR1 (in TCON) have to be SET.
  • GATE0 = 1 ==> Timer0 is operated provided that TR0 (in TCON) is SET and Sign on INT0 is HIGH.
  • GATE0 = 0 ==> Timer0 is operated no matter Sign on INT0 pin however TR0 (in TCON) have to be SET.

The C/Tx bit is used selects the supply of pulses for the Timer to depend.

  • C/T1 = 1 ==> Timer1 counts pulses from Pin T1 (P3.5) (Counter Mode)
  • C/T1 = 0 ==> Timer1 counts pulses from inner oscillator (Timer Mode)
  • C/T0 = 1 ==> Timer0 counts pulses from Pin T0 (P3.4) (Counter Mode)
  • C/T0 = 0 ==> Timer0 counts pulses from inner oscillator (Timer Mode)

TxM0

TxM1 Mode

Description

0

0 0 13-bit Timer Mode (THx – 8-bit and TLx – 5-bit)

0

1 1 16-bit Timer Mode
1 0 2

8-bit Auto Reload Timer Mode

1 1 3

Two 8-bit Timer Mode or Cut up Timer Mode

NOTE: x = 0 for Timer 0 and x = 1 for Timer 1.

IE (Interrupt Allow)

The IE or Interrupt Allow Register is used to allow or disable particular person interrupts. If a bit is SET, the corresponding interrupt is enabled and if the bit is cleared, the interrupt is disabled. The Bit7 of the IE register i.e., EA bit is used to allow or disable all of the interrupts.

8051 Microcontroller Special Function Registers (SFRs) Image 14

The next desk describes the features of every bit within the IE Register.

Bit

Image Description

Extra Data

7

EA International Interrupt Allow Bit. If set to 1, particular person interrupts might be enabled. If set to 0, all interrupts are disabled.
6

 

5

ET2 Reserved  
4 ES Serial Port Interrupt Allow Bit

If set to 1, Serial Port interrupt is enabled. If set to 0, Serial Port interrupt is disabled.

3

ET1 Timer 1 Overflow Interrupt Allow Bit If set to 1, Timer 1 Overflow interrupt is enabled. If set to 0, Timer 1 Overflow interrupt is disabled.
2 EX1 Ext. Interrupt 1 Allow Bit

If set to 1, Ext. Interrupt 1 is enabled. If set to 0, Ext. Interrupt 1 is disabled.

1

ET0 Timer 0 Overflow Interrupt Allow Bit If set to 1, Timer 0 Overflow interrupt is enabled. If set to 0, Timer 0 Overflow interrupt is disabled.
0 EX0 Ext. Interrupt 0 Allow Bit

If set to 1, Ext. Interrupt 0 is enabled. If set to 0, Ext. Interrupt 0 is disabled.

NOTE: The Interrupt Allow (IE) SFR is bit addressable.

IP (Interrupt Precedence)

The IP or Interrupt Precedence Register is used to set the precedence of the interrupt as Excessive or Low. If a bit is CLEARED, the corresponding interrupt is assigned low precedence and if the bit is SET, the interrupt is assigned excessive precedence.

8051 Microcontroller Special Function Registers (SFRs) Image 15

The next desk describes the features of every bit within the IP Register.

Bit

Image

Description

7

6

5

PT2 Reserved
4 PS

Precedence of Serial Port Interrupt

3

PT1 Precedence of Timer 1 Overflow Interrupt
2 PX1

Precedence of Ext. Interrupt 1

1

PT0 Precedence of Timer 0 Overflow Interrupt
0 PX0

Precedence of Ext. Interrupt 0

NOTE: The Interrupt Precedence (IP) SFR is bit addressable.

Peripheral Knowledge Registers

SBUF (Serial Knowledge Buffer)

The Serial Buffer or SBUF register is used to carry the serial knowledge whereas transmission or reception.

8051 Microcontroller Special Function Registers (SFRs) Image 16

TL0/TH0 (Timer 0 Low/Excessive)

The Timer 0 consists of two SFRs: TL0 and TH0. The TL0 is the decrease byte and the TH0 is the upper byte and collectively they type a 16-bit Timer0 Register.

8051 Microcontroller Special Function Registers (SFRs) Image 17

TL1/TH1 (Timer 1 Low/Excessive)

The TL1 and TH1 are the decrease and better bytes of the Timer 0.

8051 Microcontroller Special Function Registers (SFRs) Image 18

On this tutorial, we have now seen the 8051 Microcontroller Particular Operate Registers (SFRs), their addresses, buildings, reset values and so on.

 

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